Question on how Quartus II Synthesizes Circuit

yes there are buf lcells sometimes. i think you have timing optimization option turned on inside synthesizer. i guess quartus tries to analyse if there is any need for time delay, and adds an lcell there to artificially generate time delay.lcells are like lava thing. lava is a base material that later generates various types of terrain.mountains valleys so on. lcells have property to transform into logic gates, registers,adders, multiplexers and so on. by adding pure lcell to circuit, it means that no useful operation is performed since lcell hadn't transformed into anything yet. but taking a signal through it takes time, and delays a signal.and quartus thinks that in your situation it is a useful thing. well, you should go in settings -> analysis and synthesis and disable timing driven synthesis checkbox. also go to fitter suboption and uncheck "optimise hold timing" . that should tell the synthesizer to not to think about timing correctness in the circuit.