Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Question about warning in Quartus II

I have done FPGA and CPLD design before, but i have never seen this error and am not sure if it is something i need to worry about or if it is a setting i need to change...im sure someone can tell me...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

You don't need. The reason is simple; they are not used in your design modules to drive or be driven. They are meant for internal JTAG circuitry and altera knows them and already connected them internally.