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I want to get some information about how to support the "10/100 Ethernet (FPGA)".
But I do not searched enough information except below:
10/100 Ethernet (FPGA)
The development board supports an RJ-45 10/100 base-T Ethernet using an external
Renesas uPD60620 PHY. This PHY supports EtherCAT, Ethernet IRT and DLR
features using 3rd party MAC IP. The PHY-to-MAC interface employs MII connection
using four data lines at 25 Mbps each for a connection speed of 100 Mbps.
And I have some questions as below:
- What is the MAC of the 10/100 Ethernet (FPGA)?
. It seems using 3[SUP]rd[/SUP] party MAC IP. But what is it? Is there some manual?
. Is the MAC a hard CORE integrated into FPGA so that it cannot be changed or customer can use any MAC IP they want, just need to download to FPGA?
- These 2 ports used for EtherCAT(mainly? Only?) or normal TCP/IP?
- Is there some app/driver/test that shows how to use it?
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Hi, Were you able to successfully use the TSE IP core for Ethercat master? How is the performance? thanks
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