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Altera_Forum
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9 years ago

Question about set_false_path statements.

Hello! I'm trying to constrain a module but I'm not sure if the sdc statement I'm using has any undesired consequences. Specifically, I have a reset synchronizer I use all the time to synchronize...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

The synopsis original set_false_path had a switch to exclude any desired path(it is called reset_path -from...)

Altera seems ignored it.

Regarding how much max/min delay. I suggest a max = min = half clock period or so to achieve balanced tSU/tH as this improves MTBF