Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Question about License?

Hi :):), My problem is when i try to recompile the project given by Stratix IV "board_update_portal" with a just change in PLL ( increase the frequency). I constate that the changement not ta...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

If the design is using some opencore IP for which you don't have the license, it will create a time limited FPGA image. If your project is called myfpga, the resulting programming file will be called myfpga_time_limited.sof instead of just myfpga.sof.