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Altera_Forum's avatar
Altera_Forum
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14 years ago

Query for unused IO pins termination

Hi, I am trying to design a development board with EP3c25U256C8N - a cyclone iii FPGA. I have some confusion regarding how to treat the various unused pins in the design of FPGA chip. I have ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

An advice:

In Quartus, create an empty design with the signals that you have connected to the FPGA, perform the pin assignment and compile the design.

In addition, once the design has been compiled, Quartus will produce the .pin text file describing each pin.

Double check your PCB design against the contents of that file and against the Cyclone III's pin connection guidelines.