Forum Discussion

sth125's avatar
sth125
Icon for New Contributor rankNew Contributor
2 years ago

Quartus thinks reset signal is a clock signal

Hello, My device is a 5M1270ZT144C4 and I am using Quartus Prime Version 22.1std 2 Build 922 07/20/2023 SC Lite Edition. I am having a similar issue as the post https://community.intel.com/t5/Inte...
Fpga Devkit
Nurina's avatar
Nurina
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hello,


I need more details and information to investigate your problem.

Is it possible for you to share the .qar file of your project through email?

I'm dropping you an email so you can send me your design through there.

To generate a .qar file, go to Project>Archive Project.


Regards,

Nurina


Recent Discussions