Forum Discussion
Altera_Forum
Honored Contributor
8 years agoQuartus Prime Lite - Difficulties with simulation
Hi all, I am trying to figure out what I am doing wrong with simulations involving Altera IP.... Below is my incredibly simple design to show off the issue I am having. I pipe a clock into a PL...
Altera_Forum
Honored Contributor
8 years agoHi,
When you generated the ALTPLL core, did you use the reset pin and what is the setting for the reset ( PLLs can be reset internally or via external reset pin). If you have used reset internally, the reset logic will be added internally and PLL will auto-reset itself on Power-on. If using external reset , you will have to provide the reset controls as you've already done. During simulations, have you also included the device specific simulation libraries for the PLLs? - Abr