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Altera_Forum
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8 years ago

Quartus Prime Lite - Difficulties with simulation

Hi all, I am trying to figure out what I am doing wrong with simulations involving Altera IP.... Below is my incredibly simple design to show off the issue I am having. I pipe a clock into a PL...
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Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Hi,

May be because of compilation order,component interface declaration.

If you compile each file separately and you have to compile from the bottom up.

or

Use script to setup environment which is generated during design.

Threads addressing same issue

http://www.alteraforum.com/forum/showthread.php?t=36720

https://www.alteraforum.com/forum/showthread.php?t=53077

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)