Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Quartus Prime Lite - Difficulties with simulation

Hi all, I am trying to figure out what I am doing wrong with simulations involving Altera IP.... Below is my incredibly simple design to show off the issue I am having. I pipe a clock into a PL...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Can you even synthesize the design in Quartus? Perhaps the PLL IP was not generated correctly or you didn't generate simulation model files. Did you make sure that the simulation model is getting compiled in ModelSim?