Quartus II simulator

eeeh nobody loves you, davchang.it took 3 years for someone to answer you.

in verilog hdl

its `timescale 1 ps / 1 ps

for example

i have changed so that modelsim will think that all the simulation will happen in 1 nanosecond timespace and the precision of simulation (simulation step) will be 10ps.

if you want to increase simulation detalisation,precision, make 1ps instead of 10ps.

`timescale 1ns / 10ps

module(signal,clock,out)

//some code here

endmodule