Quartus Error (13066): Illegal directional connection from the pin (inout)

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Ive deleted your duplicate post, double posting is not allowed.

FPGAs only have tristates on the external pins. You cannot drive tri-states internally on the FPGA. hence the error.

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Hi, Tricky,

Thanks a lot for your reply.

I understand the FPGA can only drive tristate on the external pins and didn't mean to do it either.

In the below code, I was trying to latch the data from pin to internal register and put the internal data to pin when OE is enabled. Please help point out my misunderstanding. Appreciate it.

regards,

Yu

		Process (in_aclr, FT2232_clk)
		begin
			if in_aclr = '0' then 
				iBusData_IN <= (others => '0');
			elsif rising_edge(FT2232_clk) then
				iBusData_IN <= FT_DataBus;
			end if;
		end process;
		FT_DataBus <= iBusData_OUT when nOE ='1' else (others => 'Z');