Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

'Pseudo-Differential I/O' Error

I'm currently designing a DDR2 controller and have gotten far enough that I'd like to implement the design and check my work. I threw it into Quartus II 9.1 and have been getting the following error ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Altera's DDR3 core has explicit dqs and dqs_n pins. my guess is that the reason is mentioned in the error, "Because the output enable of the buffer is in use, the Fitter will not create a negative pin without a complement output enable path."