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CLa_R
Occasional Contributor
Occasional ContributorProtection diode for FPGA IO pins
Hi to all. For my project I am using a Cyclone IV-E FPGA. The lowest input voltage on its IO pins is -0.5V (as showed on Altera datasheet). I have many input that can be lower that -0.5v (around -...
Hi,
Both scheme holds good for your design.
Refer table 6-2 for impedance details.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-iv/cyiv-51006.pdf
Regards
Anand
CLa_ROccasional Contributor
Occasional ContributorThanks for the reply.
I still have some doubts concerning the input impedance, in my case, I use a 3.3V LVTTL level, but in table 6.2 I don't see any value of the input resistance.
How should I interpret?
AnandRaj_S_Intel
Regular Contributor
Regular Contributor
