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Altera_Forum
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14 years ago

Proper Constraints Clock Enable Multicycle

Hello all, I'm new to Altera devices and the Quartus software. I had a quick question about multicycle constraints for clock-enables. My clocking architecture is pretty simple. I have a 50MHz...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Hi.

Try to add this: 


set_multicycle_path -hold 11 
-to  
-through ]
set_multicycle_path -hold 3 
-to  
-through ]