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I'm not sure what source you are referring to (i.e., where the jbistub.c source code comes from),
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So I'm using JAM STAPL from there:
http://www.altera.com/support/devices/tools/jam/tls-jam.html The source code from there:
https://www.altera.com/download/legacy/jam/dnl-byte_code_player.jsp unzip the exe you will found the file that I was speaking about (jbistub.c)
From source line 244 you can see what I was speaking about.
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but if you are looking at a port that uses the parallel port, you have to realize that the 'classic' parallel port is output only at the DATA registers, and then input is obtained from either the CONTROL or STATUS registers. Those registers need to have their output drivers disabled by basically writing 1's to the port, so that an external signal can drive the pin low. Hence a line like:
write(com_port, &ch_data, 1);
to port 1 could simple be deasserting the contol lines so that the TDO signal can be read.
Just a guess ...
Cheers,
Dave
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So this 0x7e will be a parallel port specific thing! I will make some test with or without to see.
thx
kap
Honored Contributor
