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Altera_Forum
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16 years ago

Program the EPCS via the JTAG interface (cycIII)

Hi Guys, I am trying to re-program the EPCS through the FPGA JTAG port. Does anyone familiar if Altera has some C code or AppNote explaining how to do so in the attached topology? The ba...
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Altera_Forum
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16 years ago

Hi rbugalho,

I did this of course, I had converted the .JIC file into JAM file using the Altera programmer, as mention in AN370.

we are using linux OS, So the software guy had converted and implemented the Windows functions (of the STAPL) to linux functions, and mapped the IO's and the std file managament,

but still no luck,

he had succeded in reading the SFL version(#31), but still we get an error of :

Unrecognized device

Exit code = 6 … Unrecognized device

he added some debuging print out to the code, and we are getting now:

jam_process_exit()

error code# 6

jam_process_action()

error code# 6

thus the error came from this rotines.

Does anyone success performing this process?

Are you familer with any AN for the STAPL beside the Readme file of the STAPL?

Thanks,