problems with transmitter PLL input - Stratix II GX

Hi everybody,

I have a doubt on the receiver section of the stratix II gx , related to the previous posts in this thread. The situation is the same of my first post, ok I've understood there's no possibility to have the tx section working with my setup, fine.

The doubt is about the rx section: when I had the problem with the tx, I've opened a service request about it on altera website ("mysupport").

I had some mail exchange with them, but I still don't understand their final answer to my requests. We were talking about the possibility of obtaining a 1600 Mb/s datarate with my current setup (only 40 Mhz clk on my custom board). Here is his answer:

" It is impossible to obtain a rx datarate of 1600 Mb/s or of 800 Mb/s, clocking the ALT2GXB receiver with a 80 Mhz clock, which is the output of another PLL. The reason is that the clock of ALT2GXB must come from pin and does not support the output of another PLL. "

BUT I have some code developed by a colleague, for the same board, working fine with a 800 Mb/s datarate. The code was implemented in a "real" situation (no just simulation) , and it fully worked.

So, should I trust my colleague or Altera support? :confused:

thanks to anybody who can help me to clarify this matter, all the best,

C