problems with SERDES

Hi Mathais,

You have told us what the pulse looks like, but you have not told us what you want to know about it.

What does 'catch' mean to you? What do you want to do every time you 'catch' the pulse?

Do you want to gather statistics on the pulse high-time, low-time, do you want to average pulses together, etc?

Pulse widths of 50ns to 100ns can be used to clock regular I/O on an FPGA, or you can capture more detail about the pulse using the SERDES or an ALTLVDS transceiver channel.

If you could explain things at more of a system-level, then we can suggest an implementation.

Cheers,

Dave