problems with SERDES

What are the properties of the pulse you care about?

If you only care that the pulse 'occurred' you could simply use it as a clock signal to a register. That register can toggle a signal each time a pulse is received. The toggling signal can then be synchronized to an FPGA clock, and a pulse in that domain used to set a flag, start/stop counters etc.

If you need to know how long the pulse was asserted for, then you basically want a 1-bit ADC, i.e., the SERDES channel. What type of accuracy do you need the pulse time to be measured?

You can use the ALTGX function without having to perform clock and data recovery. You could also use an ALTLVDS component up to about 1Gbps sampling frequency (1ns).

The implementation you need depends on what you are trying to measure, and what FPGA family you are planning to use. Could you please clarify.

Cheers,

Dave