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Altera_Forum
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15 years ago

Problem with port mapping in Quartus

Hello, I am trying to model a two dimensional array of registers using port mapping in quartus. I have first designed a five stage shift register for which I am getting the desired result i.e., th...
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Altera_Forum
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14 years ago

Thank you Tricky for addressing my query... I have faced the problem when I was trying do Gate level Simulation. I tried with the nested if for CE as you suggested but it is still not working. I am not sure but I think this has got to do something with the software because the code has worked properly with other softwares. I have attached the image of the output with this message.