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Altera_Forum
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15 years ago

Problem with port mapping in Quartus

Hello, I am trying to model a two dimensional array of registers using port mapping in quartus. I have first designed a five stage shift register for which I am getting the desired result i.e., th...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Just had another thought - you should not put the following line inside the clocked process:

output <= temp(4);

It should be on a line of its own outside the process.