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Altera_Forum
Honored Contributor
15 years agoproblem with fixed point number
sir/madam
i want to multiply 2 floating point number(say,1.5 and 2.7).but i can't understand how to convert them in integer (say 8 bit integer). i don't want to use floating multiplier bcoz it takes so many clbs in fpga.plz help.urjent:( thanks in advance.12 Replies
- Altera_Forum
Honored Contributor
has VHDL93 compatible versions of the libraries. - Altera_Forum
Honored Contributor
sir. again i am in a grate problem,during simulation it gives error in package body.in fixed_pkg body "fixed_pkg'instance_name" is used.but this attributr is not supported.
i an using vhdl93.plz sir can u give me any link of fixed_pkg link so that i can succesfully implement my program under that package.:( - Altera_Forum
Honored Contributor
thank u very much sir,now the code is succesfully run.:-P
- Altera_Forum
Honored Contributor
you need to create the ieee_proposed library. by default everything will be added to "work"
And this is an Altera Forum. ISE is a Xilinx product. - Altera_Forum
Honored Contributor
sir,
sorry. sir, i use the source code for fixed_pkg from http://www.eda-stds.org/fphdl. (http://www.eda-stds.org/fphdl/) i use this code in vhdl package file and then go to new source .there using vhdl module i write my own program using "library ieee_proposed; use ieee_proposed.fixed_pkg.all;" with other library function. but when I synthesized my code, I have error "library ieee_proposed cannot be found".i use ise 11.1. - Altera_Forum
Honored Contributor
without posting the actual error - I cannot help.
- Altera_Forum
Honored Contributor
sir, i use the source code for fixed_pkg from
http://www.eda-stds.org/fphdl. (http://www.eda-stds.org/fphdl/) i use this code in vhdl package file and go to new source .there using vhdl module i write my own program using "library ieee_proposed; use ieee_proposed.fixed_pkg.all; with other library function. sir i am little bit confused and can't solve the problem.plz help. - Altera_Forum
Honored Contributor
you probably havent included the source for the fixed package in your project. or you havent put it at the top of the file list.
- Altera_Forum
Honored Contributor
sir,
many thanks 4 ur valuable suggestion.i have gone through this fixed_pkg.in the pkg declaration " use STD.TEXTIO.all; library IEEE; use IEEE.STD_LOGIC_1164.all; use IEEE.NUMERIC_STD.all; library IEEE_PROPOSED; use IEEE_PROPOSED.fixed_float_types.all;" are used.when i implement my program using "library ieee_proposed; use ieee_proposed.fixed_pkg.all" with my other library,it gives an error -> in library IEEE_PROPOSED; use IEEE_PROPOSED.fixed_float_types.all;" line. i can't undrstand the problem.plz help.:confused: - Altera_Forum
Honored Contributor
If you're using VHDL - check out the fixed point package. then its as easy as:
my_value <= to_ufixed(1.5, 3, -4); --8 bits - 4 bits integer 4 bits fraction.