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Altera_Forum's avatar
Altera_Forum
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15 years ago

problem with cyclone POR

Hi! I'm using Cyclone I fpga. During reset my IO pins are not stable...their vibrating between '0' to tristate.. Is this normal? if so, I need a solution to keep my IO pins on tristate. can ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Hi,

can it mabye be related to the NIOS PROCESSOR reset?

can I configure the outputs of the processor to tristate during reset? or it can be only '1' or '0'?

10x asaf