Altera_Forum
Honored Contributor
15 years agoproblem wih jtag_uart in Nios when use SSRAM
Hello,
I have created the project Nios + TSE + PIO + RS-232 + pll + jtag_uart + SSRAM. Reset vector and exception vector in SSRAM. Through the jtag_uart the Nios sends the statistical information in console IDE8.0. In 20-30 minutes of job the jtag_uart ceases to work. In the console come the message nios2-terminal: exiting due to I/O error communicating with target. However project with Nios + SSRAM continues to work. It is visible on tests leds. If instead of jtag_uart to use RS-232 for sends the statistical information, that in the terminal visible, what Nios + SSRAM to work. If instead of SSRAM to use onchip_ram, there are no problem, jtag_uart works during long time, nios2-terminal doesn't give out error. In both cases of board identical. Why the nios2-terminal of IDE ceases to work when in the project there is SSRAM? I am use Q8.0 Thanks.