Forum Discussion
gusFring
New Contributor
New ContributorPotential issues in receiving LVDS protocol data from external module using HSMC Connectors
Hello there, I have a Texas Instruments module that outputs ADC data using 4-lanes LVDS from its Mezzanine connector. It provides LVDS_CLK and LVDS Frame Clock alongwith. I want to receive this dat...
Rahul_S_Intel1
Frequent Contributor
Frequent ContributorHi ,
Kindly find the inline answers.
So a custom PCB that performs proper mapping of clock and data lanes would make them compatible, right
>> Yes
Clock required for receiving data into HSMC?
>>Is it possible to use in clock of lvds ip
Also please find a reference document for HSMC
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ds/hsmc_spec.pdf
