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New Contributor

6 years ago

Potential issues in receiving LVDS protocol data from external module using HSMC Connectors

Hello there, I have a Texas Instruments module that outputs ADC data using 4-lanes LVDS from its Mezzanine connector. It provides LVDS_CLK and LVDS Frame Clock alongwith. I want to receive this dat...

Rahul_S_Intel1

Frequent Contributor

6 years ago

Hi ,

Kindly find the inline answers.

So a custom PCB that performs proper mapping of clock and data lanes would make them compatible, right

>> Yes

Clock required for receiving data into HSMC?

>>Is it possible to use in clock of lvds ip

Also please find a reference document for HSMC

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ds/hsmc_spec.pdf

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Potential issues in receiving LVDS protocol data from external module using HSMC Connectors

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