Honored ContributorHello,
Is it possible to use the LVDS transceiver IO as GPIO or are they dedicated as LVDS? I have searched all day and found nothing definitive. I tried to use as GPIO but I get: Error (169033): I/O pin counter[0] with Termination logic option setting Series 50 Ohm without Calibration cannot be placed inside I/O Bank B0L because the I/O bank does not support the requested Termination setting Thanks, Tom
Honored ContributorNot sure which device you are using... but the info should be available in the handbook. For example, looking at Cyclone V:
https://documentation.altera.com/#/00005773-AA$NT00080132 You can see that the FPGA I/O support GPIO and High Speed LVDS on the blue-colored banks, while the transceiver block does not support GPIO.Honored ContributorThank you for shedding a little sunshine on this issue. The Arria V is considerably more complex than the Cyclone but I think that confirms my present understanding that "no". Doesn't put ALTR off the hook for having better tools/warning messages. Frankly, the diagram just shows that "these IO on the left here can't be used as GPIO." This is not the easiest information to suss out by various means.
Thanks again for your response.
