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Altera_Forum
Honored Contributor
15 years agoPLL output square wave distorted
I am testing PLL output from an old Stratix board. The PLL has an onboard 80MHz crystal as input clock. However at > 60 MHz, the PLL output is not as square as I wish with ripple and 50mv u...
Altera_Forum
Honored Contributor
15 years agochecking the pin planner, the output pin is 3.3 v LVCMOS.