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Altera_Forum
Honored Contributor
8 years agopin assignment problem
Hi, I am new to quartus ii. I have created a bdf file instead of verilog/vhdl . i am taking input through terasic data conversion card and through sma cable i am giving a sine wave but i am not...
Altera_Forum
Honored Contributor
8 years agoHi,
i have imported the .csv file given in documents of FPGA for pin assignments . IT doesn't accepts means when i manually make the pin assignments for my input and output it doesnt change the value due to which i am not able to see the correct input and output at Signal Tap Analyzer.