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Altera_Forum
Honored Contributor
Honored Contributorpin assignment problem
Hi, I am new to quartus ii. I have created a bdf file instead of verilog/vhdl . i am taking input through terasic data conversion card and through sma cable i am giving a sine wave but i am not...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- There will be at least an automatically selected fitter location shown for each port signal after compilation if you didn't assign a location. Did you select a FPGA type in device assignments? How? --- Quote End --- Hi, Yeah there is automatic selected fitter but the i cant find the correct input in signal tap. i have attached a screenshot of pin planner.
