Forum Discussion
Altera_Forum
Honored Contributor
13 years agoPHY Control - access
Hello!! I'm very new in this fpga word and I'm trying to learn more about this world. I'm with a project that I'm getting 16 bit data already packet and ready to send, I don't have to implement the ...
Altera_Forum
Honored Contributor
13 years agoWell if you are reading back your packets with Wireshark, you will need a compliant Ethernet packet with a complete header, including the preamble, source and destination MAC addresses and Ethertype, and the CRC at the end. Without that the Ethernet packet will be dropped by the PC's network card and you won't see it in Wireshark.
If you are using one of Altera's development kit, the PHY chip is wired to start automatically the autonegotiate process after reset, so you shouldn't need to do anything on MDIO. Just ensure that you know what speed was negotiated and that you are using the proper clock frequency and interface protocol in accordance with the link speed.