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Altera_Forum
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9 years ago

Pcie link training failed (CycloneIVGX)

Hi all! I have problem with link training between FPGA(CYIVGX) and DSP. DSP: Ltssm alredy located at state 0x00 and 0x01 (detect.quiet and detect.active). FPGA: Ltssm alredy located at s...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
7 years ago

Hi, Did You solve this problem?

I have a similar problem.

I have TMS320C6655 and 5CGXFC7D6 connected on my board. In most power-on link training is correct. But sometimes LTSSM in FPGA hang in Polling.Compliance.

Why Polling.Compliance arise? It seems to don`t arise in normal operation. Can I prevents the LTSSM from entering Compliance?