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Altera_Forum
Honored Contributor
13 years agoAnswer found in "IP Compiler for PCI Express User Guide" pdf file in section "Recommended Speed Grades" page 22/23 :
--- Quote Start --- For the hard IP implementation, the speed grades listed are the only speed grades that close timing --- Quote End --- ==> stratix iv gx with -4 speed grade doesn't support any gen2 (x1, x4 , x8) ==> gen2 x8 can only be supported using stratix iv gx with -2 or -i3 speed grade