Forum Discussion
Altera_Forum
Honored Contributor
17 years agoOutput IO Buff is too large; DDR3
Hello, I downloaded and ran the altdq_dqs example from Altera literature webside. The example claimed these IO BUFFs could handle up to 333.333 MHz (3ns), but I found that their output B...
Altera_Forum
Honored Contributor
17 years agothanks Rysc.
I got your point. Since I only design a simple DDR3 interface; therfore, I have to avoid using the DDR3-Phy IP. The altdq_dqs example which use pll, dll, dq_dqs, and dq_iobufs are perfect for my simple application. However, the report timing from this example showed many timing violations. Are there any example or app notes cover the timing interface for DDR3? I only found the app notes that cover the tco and tpd (register to pin delay). I am searching one that could cover the DQ Out Buff compansation by DQS Out Buff.