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Altera_Forum's avatar
Altera_Forum
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15 years ago

Only pins connected to the GXB transceiver blocks can use this I/O standard.

I'm creating a simple design for a new Arria II GX board and I got stuck right off the bat when trying to assign pins for the differential reference clock (PCI Express):

Warning: Following 1 pins are differential I/O pins but do not have their complement pins. Hence, the Fitter automatically created the complement pins.

Warning: Pin "REFCLKp" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "REFCLKp(n)"

error: the i/o standard "hcsl" is not valid for i/o pad "refclkp". only pins connected to the gxb transceiver blocks can use this i/o standard.

error: the i/o standard "hcsl" is not valid for i/o pad "refclkp(n)". only pins connected to the gxb transceiver blocks can use this i/o standard.Info: Fitter preparation operations ending: elapsed time is 00:00:02

Error: Can't fit design in device

I DO have an ALTGX instance placed on my top-level design hooked up to the REFCLKp input pin. I don't get this error for a similar design for an Arria GX (which uses ALT2GXB megafunction). I have attached some screenshots.

I really hope someone can shed some light on this issue because I'm scratching my head...

Thanks!

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Problem solved. It turns out that this error message is (confusingly) displayed by QII when the OUTPUT signals from the GXB instance are not assigned. Having assigned dummy output pins, the design now compiles okay.

    This project is only used to validate pin assignments on my PCB before sending it to manufacturing so I had not hooked up the output signals.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    I meet the same problem,but I don't understand your opinion that tthe OUTPUT signals from the GXB instance are not assigned.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    My design only used the input differential pairs of the Arria II GX but Quartus II required the output differential pairs to be detected too (my design uses one-way PCIe communication).