NiosII DMA Tutorial

The FIFO (or any other device) is accessed in the same way with dma as with simple IORD/IOWR. The only difference being that dma performs the rd/wr operations in the background without involving the cpu.

So you'd better test your FIFOs (memories, I/O devices or whatever) first with simple rd/wr operations. When you are sure your hardware works properly you can start using dma and be confident this will work too.

Regarding FIFO integration, if this is used by Nios only, the better approach would be to integrating it in sopc system. The pio is not that fast and efficient way to interface an external device.

Regarding the possibility use PIO for dma, I can see a solution only for tx dma to the fifo, though very very inefficient:

Supposing your data is 8bit wide, you can define a wider PIO, including the extra signals needed to drive the fifo: in the minimal case it would be a single signal for latching data, say FIFO_PUSH.

So, you dma to the PIO 9 bits data, where the highest bit is used to toggle the FIFO_PUSH signal. Clearly you must dma at least twice the data you actually need to transfer: as I said, this is not very efficient.

Cris