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Altera_Forum
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12 years ago

NIOS II Simulation Error

Hi again. I have a simple system with Nios II e, SDRAM, On-Chip memory, JTAG-UART and Sys-ID Peripheral. I created "Hello World" in the NIos II Eclipse IDE and it runs, I get "Hello from Nios I...
Altera_Forum's avatar
Altera_Forum
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12 years ago

It seems that the CPU model is getting some X signals at one point, so check that everything is connected and initialized correctly in your test bench. You can check what the CPU is receiving back on its Avalon masters. In a VHDL simulator an uninitialised register is set to the value 'U', which can then become 'X' when combined with other signals.