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When you downloaded sof file to FPGA, ¿does a window with a cancel button appear saying: "opencore plus status:click cancel to stop using opencoreplus Ip Time remaining unlimited."? If it does, don cancel it.
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Hi'
I do also get the same error message with a dsp builder design which consists of two Avalon Memory Mapped Slave blocks. I did all the pins assignments and just dont know what to do next. The funny thing is when I use a simple SOPC design with the "hello_world.c" code, it works witout any problem on IDE.
So what could be the issue with the DSP builder design?
Please help...
Honored Contributor
