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Altera_Forum
Honored Contributor
13 years agoNIOS & usage of DMA to transfer data between dual port memory and DDR2
Dear All, in my NIOS application, once every 300ms I need to 'load' data from the on-chip FPGA memory, realised as dual-port memory, into the DDR2 memory, which is used to run my NIOS applica...
Altera_Forum
Honored Contributor
13 years agoThe pipeline bridges aren't always necessary. They are usually added to add some pipeline levels so improve timing. When you have a lot of masters connected to the same slave, the arbitration logic can add too many combinatorial levels and severly impact the FMax. By using pipeline bridges you reduce that complexity and are able to increase the FMax, at the cost of a higher latency.
You can start by directly connecting your new DMA to the memories, and if you have a time failure, go in Timequest, try to identify the most critical paths and add pipeline bridges there to correct the timing violations.