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Honored Contributor
Honored Contributornewbie asks about "LATCH primitive ... is permanently disabled"
Folks, I have a DE1 (CycloneII starter board) to learn VHDL and Quartus. I developed and successfully tested my bit-shifting FIFO UART on the DE1. With this design functional, I'd like to move it ...
Altera_ForumHonored Contributor
Honored ContributorDid you generate the first project by replacing the device in a Cyclone II project? Some synthesis settings (there are actually a lot) may heve different defaults then. It could be also, that some old synthesis results have been kept in the first project (I'm only guessing in this point). Deleting the db directory generally cleans up a project.
