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Honored Contributor
Honored ContributorMUltiple Avalon Buses in a single FPGA
Hi, Is there a way to have two avalon buses on a single FPGA. I understand that there is avalon interconnection fabic and there can be multiple masters on the bus with multiple slave units with sl...
Altera_ForumHonored Contributor
Honored ContributorI know for a fact that you can have independent sections in a single SOPC with different datawidth's. In our system, we have a NIOS processor with a dedicated data/instruction ram, then we also have a couple of other masters that only access a 128 bit wide ram.
The two systems are not directly connected to each other, and have overlapping address space, so I'm pretty sure the address and control buses are independent. But I haven't looked inside to verify. Pete
