Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Multi IO voltage JTAG

My circuit is composed 4 Stratix4s per chain. And each FPGA has multiple IO voltage. (see attachment picture) Vccio of each FPGA's bank1A is connected to 2.5V. So we connected pull-up to 2....
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

This issue is solved. The circuit has no problme. The problem was "Damaged FPGA". Thanks a lot.