Forum Discussion
Altera_Forum
Honored Contributor
15 years agoModelsim test vector to verify DDC/DUC working?
Hi there, I'm looking for Modelsim version in verilog test vector to verify my DDC/DUC working good or not. By using signal generator as input and look at signalTap to see the result. But no...
Altera_Forum
Honored Contributor
15 years agoThank pancake,
Is there samples already done in Matlab to .txt file? I already have a framework in modelsim and needs to read inputs from .txt file. Yeah, this is what I'm looking for.