model a buffer in VHDL

what do you mean by buffer? You need to elaborate more.

Buffer is used according to several contexts.

1) I know digitally minded folks use buffer to mean storing incoming streams and then releasing it under control. This could be a block of ram or fifo or even a pipe of registers.

2) analogue folks use it for buffering voltage or current sources and produce zero or so internal impedance.

3) vhdl standads suggest buffer ports meaning output port that can be read but thankfully nobody uses this port except students and professors.

4) buffer zone is also used in traffic, wars, and in fact any form of flow