Forum Discussion
Altera_Forum
Honored Contributor
15 years agominiproject
i got a title for miniproject like this,, question-Develop a VHDL model for an accumulator that calculates the sum of a sequence of fixed-point numbers. Each input number is signed with 4 pre-bina...
Altera_Forum
Honored Contributor
15 years agoi've tried it..it's juz the same as new_sum <= sum + resize(data_in, sum'length);