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Altera_Forum
Honored Contributor
Honored Contributorminiproject
i got a title for miniproject like this,, question-Develop a VHDL model for an accumulator that calculates the sum of a sequence of fixed-point numbers. Each input number is signed with 4 pre-bina...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Hi, use "generic" in entity definition. to post codes in this forum, use the [ code ] [ /code ].
entity accumulator is
generic (N : integer range 1 to 32 := 4)
port (
clk,reset, data_en : in std_logic;
data_in : in signed(N-1 downto 0);
data_out : out signed(N-1 downto 0) );
end entity accumulator;
architecture rtl of accumulator is
signal sum:signed(N-1 downto 0);
signal sum:signed(N-1 downto 0);
begin
new_sum <= sum + resize(data_in, sum'length); -- maybe do not use this statement.
-- new_sum <= resize(sum + data_in, new_sum'length);
end architecture rtl;
