Minimum freq of SERDES megafunction in Arria II GX

ChewHow,

Thanks! I'll give it a whirl.

The minimum and maximum specification depends on the clock source (for example, PLL and clock pin) and the clock routing resource you

use (global, regional, or local).

You could implement your design in Quartus II. After compilation, run simulation n timing analysis if your design could meet the device requirement.