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So it would be an attractive option to use the micro's onboard USB port to allow for programming and debugging my FPGA via JTAG. Adding an additional PHY chip such as FT2232 and supporting EEPROM might be doable, but would be more elegant solution to just use the micro, since I have to have it in my design anyways...
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I see, that emulating an USB Blaster interface can be reasonable in this case. As Dave mentioned, the
ixo.de project does basically the same with a Cypress FX2. To understand the requirements, you can e.g. trace the USB Blaster communication with an USB software monitor. You'll notice, that besides transporting the serial data stream, an FTDI device must at least support the additional requests to read the EEPROM content on initilization.
Thanks to Dave for mentioning the opencores project which I wasn't yet aware of. It does the opposite of your intented project, using the USB Blaster as a general JTAG interface.
This is quite easy on the PC driver side, because it can rely on the existing FTDI drivers. You must understand however the special USB Blaster hardware acceleration protocol. In fact, there's a number of professional JTAG tools, that are, among others, supporting USB Blaster as JTAG interface.
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