Memory Interface Grouping Assignment

Hello,

I got pretty the same problem (and I am quite a newbi in Quartus/Verilog).

I generated my NIOS with SOPC Builder.

(I was not able to post the image of the schematic)

I ran the TCL scripts given by SOPC :

-altmemddr_0_phy_ddr_pins.tcl

-altmemddr_0_pin_assignments.tcl

I made clk_n bidirectionnal

I noticed the in my .qsf file this kind of lines

--- Quote Start ---

set_instance_assignment -name OUTPUT_ENABLE_GROUP 2113154281 -to mem_dq_to_and_from_the_altmemddr_0[0]

--- Quote End ---

But I still have this kind of error:

--- Quote Start ---

Error: I/Os have a memory interface specific sub-block, but have no memory interface grouping assignment specified

-> Error: I/O "datas[63]" has a memory interface specific sub-block, but has no memory interface grouping assignment specified

--- Quote End ---

Where datas the bidir port I put on my schematic.

Can someone post his assignment file please.

Cordially

trax