Maximizing memory around a Stratix-IV

(I'm still getting used to this forum - I thought I was replying to the forum not directly to you...)

I've checked and while there are enough DQS/DQ groups on the top for 96 bits of data bus, there would NOT be enough pins left to divide this into two address buses, just as you suspected.

Therefore for the FF1517 the only hope would be a single 96-bit bus, which has barely enough pins and would have a load of 6 on the address bus, so I'm not optimistic about the speed achievable.

However on the bigger 1932-pin package, there appear to be enough pins for two 64-bit DDR3 buses each on the top and on the bottom, plus two sets of address and command buses. While this is more than we need, we can always find a use for the extra memory!

So thank you again for helping me figure out the limits of what the packages can do.